SuccessChanges

Summary

  1. Change Node::mayUse() function to return TR_UseOnlyAliasSetInterface (commit: d84ed6f) (details)
  2. Change Node::mayKill() function to return TR_UseDefAliasSetInterface (commit: ea2fdde) (details)
  3. Remove Node Alias (commit: 18abdd2) (details)
  4. Remove isAOT check in order to enable relo logging for JITServer (commit: 19eb6bf) (details)
  5. Having X86 return true value from 'getSupportsHardwareSQRT()' (commit: 64b26da) (details)
  6. Adding 'dsqrtEvaluator' in x86 (commit: 48d13f2) (details)
  7. Runtime compressed refs work (commit: 6944795) (details)
  8. Fix missing conversion in splitPostGRA (commit: 76484b9) (details)
  9. AArch64: Implement ARM64Trg1ImmSymInstruction (commit: 2cd0f0b) (details)
  10. Fixes bug found when assigning a new real register (commit: a12a2d0) (details)
  11. Move codegen/FrontEnd.cpp to env/FrontEnd.cpp (commit: 0995e26) (details)
  12. Share implementation to re-reserve trampolines on code cache switch (commit: 4b5d965) (details)
  13. AArch64: Fix code generation for adr and adrp instructions (commit: d54781f) (details)
  14. Only unblock an asynchronous signal if it is used (commit: 717082e) (details)
  15. Implement omrthread_mcs_lock, which is part of the MCS Lock API (commit: c196dd3) (details)
  16. Implement omrthread_mcs_trylock, which is part of the MCS Lock API (commit: 2c3bdd4) (details)
  17. Implement omrthread_mcs_unlock, which is part of the MCS Lock API (commit: cf627e1) (details)
  18. Implement omrthread_mcs_node_allocate, which is part of the MCS Lock API (commit: 46dd324) (details)
  19. Implement omrthread_mcs_node_free, which is part of the MCS Lock API (commit: a81723b) (details)
Commit d84ed6fceb42e241fc39343da5c6aa2a5f487c65 by aaronwang0407
Change Node::mayUse() function to return TR_UseOnlyAliasSetInterface
This commit make Node::mayUse() function to initialize the
AliasInterface from the TR_SymAliasSetInterface class directly instead
of from the TR_NodeUseAliasSetInterface class. This helps remove the
NodeAliasing class.
Signed-off-by: Bohao(Aaron) Wang <aaronwang0407@gmail.com>
(commit: d84ed6f)
The file was modifiedcompiler/il/OMRNode.hpp (diff)
The file was modifiedcompiler/il/OMRNode_inlines.hpp (diff)
The file was modifiedcompiler/il/AliasSetInterface.hpp (diff)
Commit ea2fdde26daf629ae5c6a3fdb6ed6155ec8be86b by aaronwang0407
Change Node::mayKill() function to return TR_UseDefAliasSetInterface
This commit make Node::mayKill() function to initialize the
AliasInterface from the TR_SymAliasSetInterface class directly instead
of from the TR_NodeKillAliasSetInterface class. This helps remove the
NodeAliasing class.
Signed-off-by: Bohao(Aaron) Wang <aaronwang0407@gmail.com>
(commit: ea2fdde)
The file was modifiedcompiler/il/OMRNode.hpp (diff)
The file was modifiedcompiler/optimizer/LocalAnticipatability.cpp (diff)
The file was modifiedcompiler/optimizer/LoopVersioner.cpp (diff)
The file was modifiedcompiler/il/AliasSetInterface.hpp (diff)
The file was modifiedcompiler/il/OMRNode_inlines.hpp (diff)
The file was modifiedcompiler/optimizer/OMRLocalCSE.cpp (diff)
The file was modifiedcompiler/optimizer/OMRLocalCSE.hpp (diff)
Commit 18abdd23123fc43334b72b1334144a0a067ffaf3 by aaronwang0407
Remove Node Alias
Remove all the references and definitions of
TR_NodeKillAliasSetInterface and TR_NodeUseAliasSetInterface.
Signed-off-by: Bohao(Aaron) Wang <aaronwang0407@gmail.com>
(commit: 18abdd2)
The file was modifiedcompiler/il/OMRNode.hpp (diff)
The file was modifiedcompiler/il/AliasSetInterface.hpp (diff)
Commit 19eb6bf1e65fa8283a063f88078f64cee7878236 by Dhruv.C.Chopra
Remove isAOT check in order to enable relo logging for JITServer
Signed-off-by: Dhruv Chopra <Dhruv.C.Chopra@ibm.com>
(commit: 19eb6bf)
The file was modifiedcompiler/codegen/OMRCodeGenPhase.cpp (diff)
Commit 64b26da362aede57c8a0b8a13fc756179ea66f9b by simonameng97
Having X86 return true value from 'getSupportsHardwareSQRT()'
Having X86 return true value from 'getSupportsHardwareSQRT()', in order
to make use of the reduce from `StrictMath.sqrt()` and `Math.sqrt()` to
`dsqrt` in `J9RecognizedCallTransformer.cpp`.
Signed-off-by: simonameng <simonameng97@gmail.com>
(commit: 64b26da)
The file was modifiedcompiler/x/env/OMRCPU.hpp (diff)
The file was modifiedcompiler/x/env/OMRCPU.cpp (diff)
Commit 48d13f280e149f59c1cc4f471a31bdc60401607a by simonameng97
Adding 'dsqrtEvaluator' in x86
Implementing `dsqrtEvaluator` in x86. `StrictMath.sqrt()` and
`Math.sqrt()` will be reduced to `dsqrt` instead of calling
`inlineMathSQRT` function.
Signed-off-by: simonameng <simonameng97@gmail.com>
(commit: 48d13f2)
The file was modifiedcompiler/x/codegen/FPTreeEvaluator.cpp (diff)
The file was modifiedcompiler/x/amd64/codegen/OMRTreeEvaluatorTable.hpp (diff)
The file was modifiedcompiler/x/codegen/OMRTreeEvaluator.hpp (diff)
Commit 6944795d7a71067265044d2297366b2665cdb878 by graham_chapman
Runtime compressed refs work
Update HeapLinkedFreeHeader for runtime compressed refs.
Signed-off-by: Graham Chapman <graham_chapman@ca.ibm.com>
(commit: 6944795)
The file was modifiedgc/base/MemoryPoolBumpPointer.cpp (diff)
The file was modifiedgc/base/MemoryPoolSplitAddressOrderedList.cpp (diff)
The file was modifiedgc/structs/ForwardedHeader.hpp (diff)
The file was modifiedgc/base/MemoryPoolAddressOrderedListBase.cpp (diff)
The file was modifiedgc/base/MemoryPoolBumpPointer.hpp (diff)
The file was modifiedgc/base/MemoryPoolHybrid.cpp (diff)
The file was modifiedgc/base/standard/CompactScheme.cpp (diff)
The file was modifiedgc/base/standard/ConcurrentSweepScheme.cpp (diff)
The file was modifiedgc/base/segregated/MemoryPoolAggregatedCellList.hpp (diff)
The file was modifiedgc/base/standard/Scavenger.cpp (diff)
The file was modifiedgc/base/segregated/SegregatedAllocationInterface.cpp (diff)
The file was modifiedgc/base/MemoryPoolSplitAddressOrderedListBase.cpp (diff)
The file was modifiedgc/base/HeapLinkedFreeHeader.hpp (diff)
The file was modifiedgc/base/MemoryPoolSplitAddressOrderedListBase.hpp (diff)
The file was modifiedgc/base/SlotObject.hpp (diff)
The file was modifiedgc/base/MemoryPoolAddressOrderedListBase.hpp (diff)
The file was modifiedgc/base/standard/CopyScanCacheChunkInHeap.cpp (diff)
The file was modifiedgc/base/MemoryPoolSplitAddressOrderedList.hpp (diff)
The file was modifiedgc/base/MemoryPoolAddressOrderedList.cpp (diff)
The file was modifiedgc/base/segregated/MemoryPoolAggregatedCellList.cpp (diff)
The file was modifiedgc/base/TLHAllocationSupport.cpp (diff)
The file was modifiedgc/base/segregated/SweepSchemeSegregated.hpp (diff)
The file was modifiedgc/base/MemoryPool.hpp (diff)
Commit 76484b946bf0de9f5f779a8cd29d68081c9100d5 by rahil
Fix missing conversion in splitPostGRA
There was an issue with splitPostGRA where it was creating temp slot for
the node which was either of Int8 or Int16 type. To maintain alignment,
it needed conversion to Int32 type before storing it into memory.
splitPostGRA was missing this conversion and which was causing issues on
Z where it was storing a byte into memory without conversion and then
loads a byte from that slot causing us to load most significant byte
which contains 0 instead of the original value. This commit adds the
missing conversion piece of code for such nodes.
Signed-off-by: Rahil Shah <rahil@ca.ibm.com>
(commit: 76484b9)
The file was modifiedcompiler/il/OMRBlock.cpp (diff)
Commit 2cd0f0bd897500142dad46755dc1dccb4c736a79 by saiaki
AArch64: Implement ARM64Trg1ImmSymInstruction
This commit implements ARM64Trg1ImmSymInstruction, for generating PC
relative load register instructions.
Signed-off-by: Akira Saitoh <saiaki@jp.ibm.com>
(commit: 2cd0f0b)
The file was modifiedcompiler/aarch64/codegen/GenerateInstructions.cpp (diff)
The file was modifiedcompiler/ras/Debug.hpp (diff)
The file was modifiedcompiler/aarch64/codegen/ARM64Debug.cpp (diff)
The file was modifiedcompiler/aarch64/codegen/OMRInstructionKindEnum.hpp (diff)
The file was modifiedcompiler/aarch64/codegen/ARM64Instruction.hpp (diff)
The file was modifiedcompiler/aarch64/codegen/GenerateInstructions.hpp (diff)
The file was modifiedcompiler/aarch64/codegen/ARM64BinaryEncoding.cpp (diff)
Commit a12a2d004dc1a3ede2f33d34c298d02364c3d7d9 by pushkar.bettadpur
Fixes bug found when assigning a new real register
When we assign a new real register to a virtual register (for GPRs), we
were not updating the virtual register to hold its new real register.
This led to a discrepancy between the real->virtual and virtual->real
mapping between registers. This commit ensures that the virtual register
now knows of its new real register.
Signed-off-by: Pushkar Bettadpur <pushkar.bettadpur@gmail.com>
(commit: a12a2d0)
The file was modifiedcompiler/z/codegen/OMRMachine.cpp (diff)
Commit 0995e263489a65456e8bc5853e48462c3085ccdc by Yuehan.Lin
Move codegen/FrontEnd.cpp to env/FrontEnd.cpp
Signed-off-by: Yuehan-Lin <Yuehan.Lin@ibm.com>
(commit: 0995e26)
The file was modifiedcompiler/codegen/FrontEnd.cpp (diff)
The file was addedcompiler/env/FrontEnd.cpp
The file was modifiedcompiler/codegen/CMakeLists.txt (diff)
The file was modifiedcompiler/env/CMakeLists.txt (diff)
Commit 4b5d9659b7b37009f5c43542165e2aa955c533ed by maier
Share implementation to re-reserve trampolines on code cache switch
Each code generator duplicates logic to re-reserve a trampoline for a
call target if the code cache is switched between the time the
trampoline is first reserved (likely instruction selection) and binary
encoding.
The logic is nearly the same in all cases.  Provide a common version
that is shared by all code generators.
Signed-off-by: Daryl Maier <maier@ca.ibm.com>
(commit: 4b5d965)
The file was modifiedcompiler/codegen/OMRCodeGenerator.cpp (diff)
The file was modifiedcompiler/x/codegen/X86BinaryEncoding.cpp (diff)
The file was modifiedcompiler/z/codegen/S390Instruction.cpp (diff)
The file was modifiedcompiler/arm/codegen/ARMBinaryEncoding.cpp (diff)
The file was modifiedcompiler/codegen/OMRCodeGenerator.hpp (diff)
Commit d54781fec202208c9919b0a9388b45df2904693f by konno
AArch64: Fix code generation for adr and adrp instructions
This commit fixes the wrong encoding of the immediate value for "adr"
and "adrp" instructions. Those two instructions encode the lower 2 bits
of the immediate value in bits 29-30 of the instruction word, and the
upper 19 bits of the immediate value in bits 5-23 of the instruction
word. There was a mistake with masking and shifting the upper 19 bits.
Signed-off-by: KONNO Kazuhiro <konno@jp.ibm.com>
(commit: d54781f)
The file was modifiedcompiler/aarch64/codegen/ARM64Instruction.hpp (diff)
Commit 717082e8167571cba2a6980a750ff06cc189fc8a by sbabneet
Only unblock an asynchronous signal if it is used
Currently, all supported asynchronous signals are unblocked during
startup. A signal is unblocked even when a signal handler is not
installed for it. This conflicts with an OMR consumer, who wants to
block a set of signals. The OMR consumer blocks a set of signals but the
OMR signal library unblocks those signals at startup. OMR signal library
should only unblock a signal if a signal handler is registered for it.
In other words, a signal should not be unblocked if it is not used i.e.
a signal handler is not registered for it.
Fixes: https://github.com/eclipse/openj9/issues/7749
Signed-off-by: Babneet Singh <sbabneet@ca.ibm.com>
(commit: 717082e)
The file was modifiedport/unix/omrsignal.c (diff)
Commit c196dd38a56a80f1458f0d83a920b9c3a358bea5 by sbabneet
Implement omrthread_mcs_lock, which is part of the MCS Lock API
Related: https://github.com/eclipse/omr/pull/4086.
Signed-off-by: Babneet Singh <sbabneet@ca.ibm.com>
(commit: c196dd3)
The file was modifiedthread/common/threadhelpers.cpp (diff)
Commit 2c3bdd441a0fdb9f6ccd2854e9626586977648f3 by sbabneet
Implement omrthread_mcs_trylock, which is part of the MCS Lock API
Related: https://github.com/eclipse/omr/pull/4086.
Signed-off-by: Babneet Singh <sbabneet@ca.ibm.com>
(commit: 2c3bdd4)
The file was modifiedthread/common/threadhelpers.cpp (diff)
Commit cf627e1200ae55ea50be568892de019be18a36db by sbabneet
Implement omrthread_mcs_unlock, which is part of the MCS Lock API
Related: https://github.com/eclipse/omr/pull/4086.
Signed-off-by: Babneet Singh <sbabneet@ca.ibm.com>
(commit: cf627e1)
The file was modifiedthread/common/threadhelpers.cpp (diff)
Commit 46dd3243dafb61e06a3169d012bfd0683b2e6b32 by sbabneet
Implement omrthread_mcs_node_allocate, which is part of the MCS Lock API
Related: https://github.com/eclipse/omr/pull/4086.
Signed-off-by: Babneet Singh <sbabneet@ca.ibm.com>
(commit: 46dd324)
The file was modifiedthread/common/threadhelpers.cpp (diff)
Commit a81723be78ef1aea5809b0909027fe006ca71b4d by sbabneet
Implement omrthread_mcs_node_free, which is part of the MCS Lock API
Related: https://github.com/eclipse/omr/pull/4086.
Signed-off-by: Babneet Singh <sbabneet@ca.ibm.com>
(commit: a81723b)
The file was modifiedthread/common/threadhelpers.cpp (diff)